5 4 3 2 1 MEMORY CHANNEL A B MEMORY CHANNEL C D D D GDDR3 8M X 32 (BGA) GDDR3 8M X 32 (BGA) SHT 13 SHT 12 From +12V DIRECT: Channel A-B memory Address, Data nad Control signals FAN Channel C-D memory Address, Data nad Control signals Slim_VGA MEM A B MEM C...
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5 4 3 2 1 MEMORY CHANNEL A B MEMORY CHANNEL C D D D GDDR3 8M X 32 (BGA) GDDR3 8M X 32 (BGA) SHT 13 SHT 12 From +12V DIRECT: Channel A-B memory Address, Data nad Control signals FAN Channel C-D memory Address, Data nad Control signals Slim_VGA MEM A B MEM C D CRT1 slim DAC1 R G B HSY VSY DDC1DATA DDC1CLK FILTERS STRAPS GPIO CONN SHT 7 SHT 20 C SHT 20, 22 C POWER REGULATION BIOS SHT 14,15,16,17 ROMCS# ROM SHT 4 From +12V_Bus VIP SWITCHING R423 +MVDDQ, +MVDDC, +VTT, Speed control SHEET 3, 4, 5, 6, 8, 9 +VDDC, +PCIE_VDDRC & temperature FAN TVout SHT 19 From +12V_Bus sense SHT 19 CONN Linear TVOUT +5V FILTERS TVO SHT 23 From +3.3V_Bus SHT 24 Linear +VDD_1.8V, +VDDC_CT DAC2 +VPCIE_VDDR, +A2VDD, +PVDD, +TPVDD, +MPVDD PCIE_PVDD_18, VDDCI CRT CRT2 FILTERS POWER DELIVERY SHT 21 DVI-I From +3.3V DIRECT: CONN VDDR3 From +3.3V direct Or drivitive VDDR4,5 TMDS TMDS_TX[C,2..0]N TMDS_TX[C,2..0]P HPD, DDC2CLK DDC2DATA IMPEDANCE From on board +5V MATCHING SHT 21 B B +RTAVDD From +12V DIRECT: FAN PCIE +3
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